Statistical variability in implant-free quantum-well MOSFETs with InGaAs and Ge: a comparative 3D simulation study

Introduction of high mobility channel materials including III-Vs and Ge into future CMOS generations offer the potential for enhanced transport properties compared to Si. The Implant Free Quantum Well (IFQW) architecture offers an attractive design to introduce these materials, providing excellent electrostatic integrity. Statistical variability introduced by the discreteness of charge and granularity of matter has become a key factor for current and future generations of MOSFETs and in this work numerical simulations are used to critically assess the statistical variability in IFQW transistors and compare results with equivalent conventional Si ‘bulk’ MOSFETs

Role of Self-Heating and Polarization in AlGaN/GaN Based Heterostructures

The interplay of self-heating and polarization affecting resistance is studied in AlGaN/GaN Transmission Line Model (TLM) heterostructures with a scaled source-to-drain distance. The study is based on meticulously calibrated TCAD simulations against I-V experimental data using an electrothermal model. The electro-thermal simulations show hot-spots (with peak temperature in a range of 566 K - 373 K) at the edge of the drain contact due to a large electric field. The electrical stress on Ohmic contacts reduces the total polarization, leading to the inverse/converse piezoelectric effect. This inverse effect decreases the polarization by 7 %, 10 %, and 17 % during a scaling of the source-to-drain distance in the 12 μ m, μ8 m and 4μ m TLM heterostructures, respectively, when compared to the largest 18μ m heterostructure

Interaction Between Hot Carrier Aging and PBTI Degradation in nMOSFETs: Characterization, Modelling and Lifetime Prediction

Modelling of the interaction between Hot Carrier Aging (HCA) and Positive Bias Temperature Instability (PBTI) has been considered as one of the main challenges in nanoscale CMOS circuit design. Previous works were mainly based on separate HCA and PBTI instead of Interacted HCA-PBTI Degradation (IHPD). The key advance of this work is to develop a methodology that enables accurate modelling of IHPD through understanding the charging/discharging and generation kinetics of different types of defects during the interaction between HCA and PBTI. It is found that degradation during alternating HCA and PBTI stress cannot be modelled by independent HCI/PBTI. Different stress sequence, i.e. HCA-PBTI-HCA and PBTI-HCA-PBTI, lead to completely different degradation kinetics. Based on the Cyclic Anti-neutralization Model (CAM), for the first time, IHPD has been accurately modelled for both short and long channel devices. Complex degradation mechanisms and kinetics can be well explained by our model. Our results show that device lifetime can be underestimated by one decade without considering interaction

A comparative study of defect energy distribution and its impact on degradation kinetics in GeO2/Ge and SiON/Si pMOSFETs

High mobility germanium (Ge) channel is considered as a strong candidate for replacing the Si in pMOSFETs in near future. It has been reported that the conventional power-law degradation kinetics of Si devices is inapplicable to Ge. In this work, further investigation is carried out on defect energy distribution, which clearly shows that this is because the defects in GeO2/Ge and SiON/Si devices have different physical properties. Three main differences are: 1) Energy alternating defects (EAD) exist in Ge devices but insignificant in Si; 2) The distribution of as-grown hole traps (AHT) has a tail in the Ge band gap but not in Si, which plays an important role in degradation kinetics and device lifetime prediction; 3) EAD generation in Ge devices requires the injected charge carriers to overcome a 2nd energy barrier, but not in Si. Taking the above differences into account, the power law kinetics of EAD generation can be successfully restored by following a new procedure, which can assist in the Ge process/device optimization

Strain-Reduction Induced Rise in Channel Temperature at Ohmic Contacts of GaN HEMTs

Operating temperature distributions in AlGaN/GaN gateless and gated devices are characterized and analyzed using the InfraScope temperature mapping system. For the first time, a substantial rise of channel temperature at the inner ends of ohmic contacts has been observed. Synchrotron radiation based high-resolution X-ray diffraction technique combined with drift -diffusion simulations show that strain reduction at the vicinity of ohmic contacts increases electric fi eld at these locations, resulting in the rise of lattice temperature. The thermal coupling of a high conductive tensile region at the contacts to a low conductive channel region is an origin of the temperature rise observed in both short- and long-channel gateless devices

NBTI of Ge pMOSFETs: understanding defects and enabling lifetime prediction

Ge pMOSFETs are strong candidates for next technology nodes and record hole mobility has been reported for Al2O3/GeO2/Ge and HfO2/SiO2/Si-cap/Ge structures. Reliability, however, is still problematic and currently impedes the progress. Large NBTI exists in GeO2/Ge, and little is known about the defects. Si-cap/Ge device has superior reliability, but its lifetime, τ, cannot be predicted by power law extrapolation. This work demonstrates that the defects are different in Ge and Si devices. For the first time, a method is developed for Ge devices to restore the power law for NBTI kinetics, which enables τ prediction and process optimization

Identify the critical regions and switching/failure mechanisms in non-filamentary RRAM (a-VMCO) by RTN and CVS techniques for memory window improvement

Non-filamentary RRAM is a promising technology that features self-rectifying, forming/compliance-free, tight resistance distributions at both high and low resistance states (HRS/LRS). Direct experimental evidence for its physical switching & failure mechanisms, however, is still missing, due to the lack of suitable characterization techniques. In this work, a novel method combining the random-telegraph-noise (RTN), constant-voltagestress (CVS) and time-to-failure Weibull plot is developed to investigate these mechanisms in the non-filamentary RRAM cell based on amorphous-Si/TiO2. For the first time, the following key advances have been achieved: i) Switching mechanism by defect profile modulation in a critical interfacial region has been identified from defect locations extracted by RTN; ii) Defect profile in this region plays a critical role in device failure, leading to different Weibull distributions during negative (LRS) and positive (HRS) CVS; iii) Progressive formation of a conductive percolation path during electrical stress is directly observed due to defect generation in addition to pre-existing defect movement; iv) Optimizing the critical interfacial region significantly improves memory window and failure margin. This provides a useful tool for advancing the non-filamentary RRAM technology

A Parametric Technique for Traps Characterization in AlGaN/GaN HEMTs

A new parametric and cost-effective tech- nique is developed to decouple the mechanisms behind current degradation in AlGaN/GaN HEMTs under a nor- mal device operation: self-heating and charge trapping. A unique approach that investigates charge trapping using both source (IS) and drain (ID) transient currents for the first time. Two types of charge trapping mechanisms are identified: (i) bulk charge trapping occurring on a time scale of less than 1 ms, followed by (ii) surface charge trapping with a time constant larger than a millisecond. Through monitoring the difference between IS and ID, a bulk charge trapping time constant is found to be independent of both drain (VDS ) and gate (VGS ) biases. Surface charge trapping is found to have a much greater impact on a slow degrada- tion when compared to bulk trapping and self-heating. At a short timescale ( 1 ms), the dynamic ON resistance degradation is predominantly limited by surface charge trapping

Low Source/Drain Contact Resistance for AlGaN/GaN HEMTs with High Al Concentration and Si-HP [111] Substrate

An optimized fabrication process of ohmic contacts is proposed to reduce the source/drain access resistance (RC) and enhance DC/RF performance of AlGaN/GaN HEMTs with a high Al concentration. We show that source/drain RC can be considerably lowered by (i) optimally etching into the barrier layer using Ar+ ion beam, and by (ii) forming recessed contact metallization using an optimized Ti/Al/Ni/Au (12 nm/200 nm/40 nm/100 nm) multilayers. We found that a low RC of ∼0.3 Ω.mm can be achieved by etching closer to the 2-Dimensional Electron Gas (2DEG) at an optimum etching depth, 75% of the barrier thickness, followed by a rapid thermal annealing at 850°C. This is due to the very small distance between the alloy and the 2DEG (higher electric field) as shown by 2D drift-diffusion simulations combined with Transmission Line Model (TLM) extractions

AC NBTI of Ge pMOSFETs: Impact of Energy Alternating Defects on Lifetime Prediction

For the first time, AC lifetime in Si-cap/Ge and GeO2/Ge pMOSFETs is investigated and it must not be predicted by the conventional DC stress method with a measurement delay. This is because the energy alternating defects are generated in Ge devices but not in Si, which introduces additional generation under DC stress